A process for measuring the phase jitter of a data signal is described in the IEE publication "International Conference on Measurements for Telecommunication Transmission Systems--MTTS" vol. 85 (1985) pages 173 and 174. In this known process, a predetermined clock signal is used as a reference signal which is compared with a data signal with regard to phase relation to determine the phase jitter of the data signal. Problems occur with this known process due to static phase shifts that cause a reduction in dynamic range. In addition, high-frequency components occur with regard to the baseband of the resulting jitter signal, thereby requiring a low-pass filter to eliminate the high-frequency components.
As described in the aforementioned publication, amplitude-modulated pulses can be obtained within the scope of the phase jitter measurement by sampling a ramp-like signal coupled to the clock signal when a data signal occurs. This known process apparently does not use a phase comparator connected to a predetermined clock signal via a frequency divider and a gate circuit controlled by a control circuit.
Furthermore, German Patent No. 38 33 486 C1 describes a process and a circuit arrangement for measuring the phase jitter of a data signal in which a ramp-like signal-generating integrator with a downstream sample-and-hold circuit is used. In this known process, the integrator is released to generate the ramp-like signal when an upstream release circuit supplies an output signal. This output signal is generated as a function of the occurrence of a clock signal and the starting status of a digital comparator which is downstream from an arrangement with two detent memories and a detent counter that receives the clock signal. The detent memories receive pulses derived from the data signals in parallel. The output of the digital comparator is connected to an address generator with a downstream intermediate memory and a downstream digital-to-analog converter. An approximate phase jitter value appears at the output of the digital-to-analog converter. A precision phase jitter value is obtained at the output of the sample-and-hold circuit. A measured quantity representing the phase jitter is generated from these two values by means of a summation circuit.